LLC's most complete calculation routine

The continuous demand for higher switching power supply densities has long been constrained by the physical size of passive components. Utilizing higher switching frequencies can significantly reduce the dimensions of critical passive elements like transformers and filters. However, this approach brings about excessive switching losses, which pose a significant barrier to high-frequency operation. To mitigate these losses and enable high-frequency operation, resonant switching technologies were developed. These technologies employ a sinusoidal approach to power delivery, allowing switching devices to operate under soft-switching conditions. This results in drastically reduced switching losses and noise. Among various resonant converters, the LC series resonant converter stands out as the simplest and most common configuration. In this topology, the rectifier-load network is connected in series with the LC resonant network, as illustrated in Figure 1 [2-4]. Here, the LC resonant network functions as a voltage divider alongside the load. By altering the driving voltage's frequency, the impedance of the resonant network can be adjusted. The input voltage is then proportionally distributed between the resonant network and the reflected load. Due to this voltage division, the DC gain of the LC series resonant converter is always less than unity. Under light load conditions, the load impedance becomes much larger than the resonant network's impedance, applying nearly the entire input voltage to the load. This poses challenges in regulating the output under light load conditions. Ideally, to achieve output regulation under no load, the resonant frequency should theoretically be infinite. To overcome the limitations of series resonant converters, LLC resonant converters were introduced [8-12]. The LLC resonant converter is essentially an enhanced version of the LC series resonant converter, featuring a shunt inductor placed in the primary winding of the transformer, as depicted in Figure 2. The introduction of the shunt inductor increases the circulating current in the primary winding, which enhances the circuit's operational efficiency. Initially, this concept was not widely understood, leading to limited attention when it was first proposed. Nevertheless, in high-input-voltage applications where switching losses dominate over conduction losses, the LLC topology demonstrates improved efficiency. In practical designs, the shunt inductor is commonly implemented using the transformer’s magnetizing inductance. The circuit diagram of an LLC resonant converter closely resembles that of an LC series resonant converter, with the key difference being the magnitude of the magnetizing inductance. The excitation inductance in an LLC resonant converter is significantly larger—typically 3 to 8 times greater than that of the LC series resonant converter’s Lr. This is generally achieved by increasing the air gap of the transformer. LLC resonant converters offer several advantages over series resonant converters. They provide output regulation across a broad range of power and load variations while maintaining a relatively stable switching frequency. Zero voltage switching (ZVS) is achievable across the entire operational range. Additionally, inherent parasitic parameters, including junction capacitance, transformer leakage inductance, and magnetizing inductance of semiconductor devices, can be utilized to facilitate soft switching. This document provides a comprehensive explanation of the LLC resonant converter’s working principles, including the design of the transformer and resonant network, along with component selection. Design examples are provided to illustrate the step-by-step process, offering valuable guidance for designing LLC resonant converters. ### LLC Resonant Converter and Fundamental Approximation Figure 3 illustrates a schematic diagram of a half-bridge LLC resonant converter. Here, Lm represents the magnetizing inductance, acting as the shunt inductor, Lr denotes the series resonant inductor, and Cr refers to the resonant capacitor. Figure 4 presents a typical waveform of an LLC resonant converter. Assuming the operating frequency aligns with the resonant frequency, determined by the resonance between Lr and Cr, a substantial excitation current (Im) is generated, which circulates within the primary winding without contributing to energy transfer. The primary current (Ip) comprises both the excitation current and the current reflected from the secondary back to the primary. In general, the LLC resonant topology consists of three stages: a square wave generator, a resonant network, and a rectifier network. - The square wave generator produces the square wave voltage Vd by alternately driving switches Q1 and Q2 with a 50% duty cycle. A minor dead time is typically introduced during continuous switching. The generator can be configured as either a full bridge or half bridge. - The resonant network comprises a capacitor, transformer leakage inductance, and magnetizing inductance. It filters out higher harmonic currents. Even when a square wave voltage is applied, the resonant network allows only sinusoidal current to flow. The current (Ip) lags behind the voltage applied to the resonant network, enabling the MOSFET to turn on at zero voltage. As shown in Figure 4, the MOSFET turns on when the voltage is zero, at which point the current flows through the anti-parallel diode. - The rectifier network generates a DC voltage, employing a rectifier diode and capacitor to rectify the AC. It can be designed as a full-wave rectifier bridge or center-tapped configuration with a capacitive output filter. The filtering effect of the resonant network can be analyzed using the fundamental approximation principle, deriving the voltage gain of the resonant converter. Assuming the fundamental component of the square wave voltage is input into the resonant network, the electrical energy is transferred to the output. Since the secondary-side rectifier circuit can serve as an impedance transformer, its equivalent load resistance differs from the actual load resistance. Figure 5 outlines the derivation of this equivalent load resistance. The primary circuit is replaced by a sinusoidal current source Iac, appearing at the input of the rectifier. Since the average value of |Iac| equals the output current Io, Iac can be described as: \[ \text{Note: } Vo \text{ refers to the output voltage.} \] Given the harmonic components of VRI do not involve power transmission, the AC equivalent load resistance can be calculated using \( VRIF / Iac \): \[ \text{Considering the transformer turns ratio (n=Np/Ns), the primary equivalent load resistance can be described as:} \] \[ \text{An AC equivalent circuit can be obtained using the equivalent load resistance, as shown in Figure 6.} \] As depicted, Vd and VRO in the figure refer to the fundamental component of the driving voltage Vd and the reflected output voltage \( VRO (nVRI) \), respectively. Using the equivalent load resistance obtained in Equation 5, the characteristics of the LLC resonant converter can be derived. Using the AC equivalent circuit shown in Figure 6, the formula for calculating the voltage gain M can be obtained: \[ \text{Figure 7 shows the difference in Q values and m=3, fo=100kHz and fp=57kHz. The gain expressed by Equation 6 is shown.} \] From Figure 7, the LLC resonant converter exhibits a voltage gain characteristic that is almost independent of the load when the switching frequency is near the resonant frequency fo. This is a notable advantage of the LLC resonant converter over traditional series resonant converters. Therefore, it is assumed that the converter operates near the resonance frequency, reducing the switching frequency fluctuation. The operating range of the LLC resonant converter is subject to peak gain (up to maximum gain), labeled ‘*’ (as shown in Figure 7). It should be noted that the peak voltage gain does not occur near fo or fp. Instead, it occurs between fp and fo. As the load becomes lighter, the Q value decreases, shifting the peak gain frequency toward fp, and reducing the peak gain. Therefore, for resonant network design, the full load condition is the worst-case scenario. For actual designs, it is usually necessary to implement the magnetic device (series inductance and shunt inductance) using the concept of an integrated transformer, where the leakage inductance serves as the series inductance, and the excitation inductance serves as the parallel inductance. When the magnetic element is constructed by this method, it is necessary to improve the equivalent circuit in Figure 6 to Figure 8 because there is leakage inductance not only at the primary but also at the secondary. Failure to consider the leakage inductance of the transformer secondary often leads to design errors. When dealing with actual transformers, it is advisable to use equivalent circuits with Lp and Lr, since these inductance values can be easily measured at the primary by separately opening and shorting the secondary windings. In the actual transformer, Lp and Lr can be measured on the primary side under the condition that the secondary winding is open and shorted, respectively. When considering integrated transformers, a virtual gain MV is introduced, which is caused by the leakage inductance of the secondary side. Using the improved equivalent circuit of Figure 9, the gain expression of Equation 6 can be adjusted to obtain the gain expression of the integrated transformer: \[ \text{Figures 9-18 illustrate the detailed derivations.} \] Operating modes and maximum gain considerations play a crucial role in optimizing LLC resonant converters. The LLC resonant converter can operate at either a lower or higher resonant frequency (fo), as shown in Figure 10. Figure 11 shows the current waveforms of the primary and secondary transformers for each mode of operation. Operating below the resonant frequency (Case I) allows the secondary rectifier diode to achieve soft commutation, although the loop current is larger. As the operating frequency decreases and deviates from the resonant frequency, the circulating current is greatly increased. Although operating at higher than the resonant frequency (Case II) allows for a reduction in the circulating current, the rectifier diode cannot achieve soft commutation. For high output voltage applications, such as plasma display panels (PDPs), it is recommended to operate below the resonant frequency because the reverse recovery losses of the rectifier diodes in this type of application are comparable. On the other hand, when operating in the upper resonance, the on-state loss is smaller than when operating in the lower resonance. For low output voltage applications, such as liquid crystal display (LCD) TV or laptop adapters, good efficiency is exhibited. Because of this type of application, the secondary rectifier diode is suitable for Schottky diodes, and the reverse recovery problem is irrelevant. However, when operating at the upper resonant frequency, operating at light loads causes a large increase in switching frequency. When the upper resonance works, the frequency jump function is needed to prevent the switching frequency from rising sharply. Above the peak gain frequency, the input impedance of the resonant network is inductive, and the input current (Ip) of the resonant network lags behind the voltage (Vd) applied to the resonant network. Thus the MOSFET can achieve zero voltage turn-on (ZVS), as shown in Figure 12. Below the peak gain frequency, the input impedance of the resonant network is capacitive, and Ip leads Vd. When operating in the capacitive range, during the switching process, the body diode of the MOSFET is reversely recovered, causing severe noise. Another problem with entering the capacitive range is that the output voltage is out of control due to the inverse of the gain slope. The minimum switching frequency should be appropriately higher than the peak gain frequency. The appropriate input voltage range for the LLC resonant converter is determined by the peak voltage gain. Therefore, the resonant network should be designed to ensure that the gain curve has sufficient peak gain and can cover the entire input voltage range. However, below the peak gain point, the ZVS condition is lost, as shown in Figure 12. Therefore, when determining the maximum gain point, it is required to reserve some margin, ensuring stable ZVS operation during the load transient and startup phases. Typically, for the actual design, 10-20% of the maximum gain is selected as the margin, as shown in Figure 14. Under a given condition, even if the peak gain is obtained using the gain formula 6, it is difficult to express the peak gain in a clear form. To simplify analysis and design, a simulation tool can be used to obtain the peak gain, as shown in Figure 14. The figure shows the peak gain (up to the maximum gain) as the value of Q changes for different values of m. It can be seen that by reducing the m and Q values, a higher peak gain can be obtained. For a given resonant frequency (fo) and Q value, decreasing m means that the magnetizing inductance is reduced, which will result in an increase in the circulating current. Naturally, a trade-off should be made between the available gain range and the conduction loss. ### Characteristics of the FSFR Series The FSFR family integrates a pulse frequency modulation (PFM) controller and a MOSFET specifically designed for zero voltage switching (ZVS) half-bridge converters with minimal external components. The internal controller includes an undervoltage lockout, an optimized high-side/low-side gate driver, a temperature-compensated precision current-controlled oscillator, and a self-protection circuit. Compared to discrete MOSFET and PWM controller solutions, the FSFR family reduces total cost, component count, size and weight while increasing efficiency, productivity and system reliability. Design Steps This section provides design steps based on the schematic shown in Figure 17. The integrated transformer has a center tap and the input voltage comes from a pre-regulator-power factor corrector (PFC). A DC/DC converter with a 192W/24V output has been selected as a design example. The design specifications are as follows: - Nominal input voltage: 400VDC (PFC stage output) - Output: 24V/8A (192W) - Hold time requirement: 20 milliseconds (50Hz power frequency) - PFC output DC capacitor: 220μF [[STEP-1] Determining the various indicators of the system] [[STEP-2 determines the maximum and minimum voltage gain of the resonant network]] According to the discussion in the previous section, in order to reduce switching frequency fluctuations, the LLC resonant network should typically be designed to operate near the resonant frequency (fo). Since the LLC resonant converter is powered by the PFC output voltage, the PFC nominal output voltage should be accommodated in order to design the operating frequency of the converter at fo. As can be seen from Equation 10, the gain at fo is a function of m (m = Lp / Lr). The gain at fo is determined by the choice of m values. Although a high peak gain can be obtained when the value of m is small, an excessively small value of m causes a deterioration in the coupling of the transformer and a decrease in efficiency. Typically, setting m to 3 to 7 allows the voltage gain at the resonant frequency (fo) to be 1.1 to 1.2. After the value of m is selected, the voltage gain at the nominal output voltage of the PFC can be described as: \[ \text{Equation 10 to 18 show detailed calculations.} \] Core: EER3542 (Ae=107 mm2) Skeleton: EER3542 (horizontal/segment type) 6. Experimental Verification In order to verify the validity of the design process in this instruction manual, the converter design example was built and tested. All circuit components involved in the design example have been adopted. Figures 30 and 31 show the operating waveforms at full load and no load for the nominal input voltage. It can be seen that due to the resonance effect, the drain-source voltage (VDS) of the MOSFET drops to zero before turn-on, achieving zero voltage switching. Figure 32 shows the resonant capacitor voltage and primary current waveform at full load. The peak value of the resonant capacitor voltage and the primary side current are 325V and 1.93A, respectively, which closely matches the calculated value of the eighth step in the design process chapter. Figure 33 shows the resonant capacitor voltage and primary side current waveform for an output short circuit condition. For the output short-circuit condition, when the primary current is greater than 3A, the overcurrent (OCP) acts. The maximum voltage of the resonant capacitor is slightly higher than the calculated value of 419V, because the 1.5μs turn-off delay makes the OCP operating current slightly higher than 3A (refer to the FSFR2100 product specification). Figure 34 shows the voltage and current waveforms of the rectifier diodes under full load and no load conditions. The voltage stress is slightly higher than the calculated value in the ninth step due to the voltage overshoot caused by the stray inductance. Figure 35 shows the ripple waveform of the output voltage under full load and no load conditions. The ripple of the output voltage matches the design value in the ninth step. Figure 36 shows the efficiency measurements for different load conditions. The efficiency at full load is approximately 94%. Graphic Network

Indoor Access Point

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